Logic Gates

Leaving Cert Higher Level Computer Science revision notes with diagrams.

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Basic Electronics, Logic Gates, and Binary Rationale

Electrical Fundamentals and Ohm's Law

Digital computing relies on fundamental electrical quantities:

  • Voltage (VV): The electrical potential difference driving electric charge through a circuit, measured in volts (V).
  • Current (II): The rate of flow of electric charge, measured in amperes (A).
  • Resistance (RR): The opposition to the flow of electric current, measured in ohms (Ω\Omega). Resistors limit current to protect delicate electronic components, such as LEDs.
  • Ohm's Law: Relates these three properties: V=I×RV = I \times R. For instance, if an LED circuit runs on a 3 V3\text{ V} supply and must not exceed 0.015 A0.015\text{ A} (15 mA15\text{ mA}) of current, the required resistance is R=VI=30.015=200 ΩR = \frac{V}{I} = \frac{3}{0.015} = 200\,\Omega.
  • Capacitors: Store and release electrical charge to smooth out voltage spikes and build dynamic memory cells.
  • Transistors: Microscopic semiconductor switches. Applying a voltage to the control gate allows current to pass (switch ON); removing the voltage stops current flow (switch OFF).

Why Computers Use Binary

Computers use binary (bits 0 and 1) because electronic circuits function most reliably with two distinct physical states: high voltage (such as +3.3 V+3.3\text{ V} or +5 V+5\text{ V} representing 1) and low voltage (0 V0\text{ V} representing 0).

If a circuit had to differentiate between ten discrete voltage levels (one for each decimal digit), the margins between levels would be very narrow. Slight electrical noise, heat fluctuations, or component aging would easily cause one level to be misread as another. With only two states, there is a wide voltage margin, ensuring small electrical variations do not flip a 1 into a 0.

Schematic voltage scales compare two widely separated binary levels with ten closely spaced levels under equal small disturbances.
Schematic voltage scales compare two widely separated binary levels with ten closely spaced levels under equal small disturbances.

Logic Gates and Truth Tables

Transistors are combined to build logic gates, which evaluate Boolean logic rules:

Input AAInput BBNOT AAAND (A⋅BA \cdot B)OR (A+BA + B)NAND (A⋅B‾\overline{A \cdot B})NOR (A+B‾\overline{A + B})XOR (A⊕BA \oplus B)
00100110
01101101
10001101
11011000
  • NOT: Inverts the single input bit.
  • AND: Outputs 1 only when both inputs are 1.
  • OR: Outputs 1 when one or both inputs are 1.
  • NAND: Outputs 0 only when both inputs are 1 (inverse of AND).
  • NOR: Outputs 1 only when both inputs are 0 (inverse of OR).
  • XOR: Outputs 1 when inputs differ; outputs 0 when they match.

Combinational Circuits: The Half-Adder and Full Adder

A half-adder sums two 1-bit binary inputs (AA and BB) to produce a Sum (SS) and a Carry (CC):

  • Carry (CC): C=A AND BC = A \text{ AND } B
  • Sum (SS): S=A⊕B=(NOT A AND B) OR (A AND NOT B)S = A \oplus B = (\text{NOT } A \text{ AND } B) \text{ OR } (A \text{ AND NOT } B)

When A=1A = 1 and B=1B = 1, binary addition gives 1+1=1021 + 1 = 10_2, giving C=1C = 1 and S=0S = 0. Two half-adders combined with an OR gate form a full adder, which accepts an additional carry-in bit so multi-bit numbers can be added together.

Inputs A and B feed an AND carry path and two complementary AND paths joined by OR to produce the sum.
Inputs A and B feed an AND carry path and two complementary AND paths joined by OR to produce the sum.

Multi-Input Logic Circuit Truth Table

To build a truth table for an unfamiliar combinational circuit, list all 2n2^n combinations of the nn inputs in binary order, add columns for intermediate gates, and determine the final output.

For the circuit Q=(A AND B) OR (NOT C)Q = (A \text{ AND } B) \text{ OR } (\text{NOT } C):

A and B enter an AND gate; C enters a NOT gate; both intermediate outputs enter an OR gate producing Q.
A and B enter an AND gate; C enters a NOT gate; both intermediate outputs enter an OR gate producing Q.
AABBCCA AND BA \text{ AND } BNOT C\text{NOT } CQQ
000011
001000
010011
011000
100011
101000
110111
111101
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